| Hierarchy |
Input |
Constant Input |
Unused Input |
Floating Input |
Output |
Constant Output |
Unused Output |
Floating Output |
Bidir |
Constant Bidir |
Unused Bidir |
Input only Bidir |
Output only Bidir |
| cpu1|u0|Regs |
29 |
0 |
0 |
0 |
48 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cpu1|u0|alu |
38 |
0 |
0 |
0 |
16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cpu1|u0|mcode |
23 |
0 |
4 |
0 |
68 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cpu1|u0 |
23 |
3 |
0 |
3 |
40 |
3 |
3 |
3 |
0 |
0 |
0 |
0 |
0 |
| cpu1 |
14 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |